1. Field of the Invention
The present invention relates to a method for producing an electronic circuit device including a repair step in which, in the case where a semiconductor device once mounted on a substrate is defective, the defective semiconductor device is removed therefrom, and a new semiconductor device is mounted thereon; a jig for making a solder residue uniform and a jig for transferring a brazing metal paste used in the production method; and an apparatus for producing an electronic circuit device used for performing the production method.
2. Description of the Related Art
During the above-mentioned repair step, when a defective semiconductor device (electronic component) is removed from a wiring board (i.e., substrate for mounting a semiconductor device), a solder residue, for example, made of brazing metal remains on connecting portions (i.e., lands) of the wiring board. Since the height of the solder residue is not uniform, when a new semiconductor device is mounted on the wiring board in this state, a connection failure may occur, leading to disconnection or the like.
According to the conventional repair method, in order to prevent the connection failure, the following steps (1) and (2) have been performed.
(1) First, a solder-wettable metal plate (i.e., a metal plate over which solder can spread well) is pressed against a solder residue and heated in this state so that the solder residue adheres to the metal plate, whereby the solder residue on the wiring board is completely removed.
(2) A flux is coated onto lands of the wiring board for the purpose of preventing the lands from being oxidized. Solder projecting electrodes of a semiconductor device to be newly mounted melt by heating in an atmosphere furnace or in an air-oven, whereby the semiconductor device is connected to the wiring board.
For example, Japanese Laid-open Publication Nos. 1-209736 and 8-46351 disclose conventional examples as described above.
In the case where a semiconductor device is bonded to a wiring board, using solder projecting electrodes by flip chip bonding, when there is a difference in thermal expansion coefficient between the semiconductor device and the wiring board, there is the following problem. The difference between the temperature at which the solder projecting electrodes melt by heating and room temperature, or the difference between the temperature during operation of the semiconductor device and the temperature when the semiconductor device is not being operated causes a difference in expansion and contraction between the semiconductor device and the wiring board (i.e., thermal stress). This may strain connecting portions of the solder projecting electrodes to induce a connection failure. Thus, strain on the connecting portions of the solder projecting electrodes caused by the difference in thermal expansion coefficients of the parts decreases the reliability of a product.
In the case where nothing fills between the semiconductor device and the wiring board, the strain of the connecting portions of the solder projecting electrode is in good agreement with a value calculated from the Coffin.multidot.Manson connection fatigue life expression represented by the following Formulae (1) and (2). In order to decrease the maximum strain .gamma..sub.max in the connecting portions, as is understood from Formula (2), the height H.sub.j, of the connecting portions should be increased. For this purpose, the amount of solder is increased. EQU Nf=C.multidot.f.sup.1/3 .multidot.1/.gamma..sub.max.sup.2 .multidot.exp(.DELTA.E/KT.sub.max) (1) EQU .gamma..sub.max =1/(D.sub.min/2).sup.2/.beta. .multidot.(V.sub.j /.pi..multidot.H.sub.j.sup.(1+.beta.)).sup.1/.beta. .multidot..DELTA.T.multidot..DELTA..alpha..multidot.d (2)
where N.sub.f : number of cycles until a connection failure occurs
C: proportionality factor PA1 .beta.: solder material constant PA1 K: Boltzmann's constant PA1 f: frequency of temperature cycle PA1 T.sub.max : maximum temperature of temperature cycle PA1 D.sub.min : minimum diameter of connecting portions (i.e., smaller value of upper and lower diameters D.sub.B1 and D.sub.B2 of connecting portions in FIG. 13) PA1 .DELTA..alpha.: difference in thermal expansion coefficient between wiring board and semiconductor device PA1 d: distance between focused solder joint and the neutral point of thermal stress PA1 .DELTA.E: activating energy leading to fatigue
For reference, FIG. 13 illustrates representative elements among those shown above.
As described above, according to the conventional repair method, the solder residue is completely removed, and the semiconductor device is connected to the wiring board by using the solder in the solder projecting electrodes alone. Therefore, the amount of solder is small. This makes it impossible to increase the height H.sub.j of the connecting portions so as to improve the reliability of the product.